A versatile IC that may well have more merit than we give it credit for.

The CD4047 is another one of those Integrated Circuits (ICs) that many makers won’t even realise they could benefit from. For this month’s Classroom, we take a look at what it does and how it is implemented. We won’t go into uses too heavily. Like the CD4049 and CD4050 in our last issue, the uses are very broad and situation-specific. However, as you read about the CD4047, its potential uses in your specific context will likely start to occur to you.

When most makers think of ‘astable’, ‘monostable’ and ‘multivibrator’, many jump straight to the ubiquitous NE555. At best, we might think of an op-amp or transistor-based circuit. The CD4047 is a specialised device in the 4000 CMOS series that is designed specifically to be a versatile and reliable multivibrator with minimum external part count. It has applications in discrete circuits but microcontroller applications are around as well, particularly when it comes to using the monostable mode for managing input pulses. It has both astable and monostable control pins so either option can be easily used; it is ‘gatable’ so the astable mode is controllable; and best of all, it requires only one external capacitor and resistor for basic operation.

Unfortunately, this IC doesn't really support an interesting build on its own besides flashing some LEDs, which is what we have provided at the end. Generally, this IC will be used, like last month's, as part of a bigger project to solve a need. We hope uses for it in your particular context become apparent as you read through.

The particular examples we used during testing are branded as 'Philips'. That made them fairly old, as Philips spun off their semiconductor business as an independent company, NXP, in 2006. The NXP name came from 'Next Experience', and the part of the business that makes discrete ICs has since become Nexperia. As far as we can tell it has been further spun off as a company with new investors. We found the Nexperia-branded datasheet very quickly, and we were delighted with the quality of it as a document. It is formatted unusually well for a datasheet and should suit the maker more than the scanned copies of 70s or 80s engineering documents many are used to.

However, because the logo and date code revealed that our examples are revision 3 devices made in the 47th week of 2003, before the spin-off, we had to search for the Philips datasheet to make sure the important details were the same.With so many changes in the manufacturing company, there was ample possibility of minor design changes. Thankfully in this case, they are the same. So, we used the Nexperia document, which relates to revision 6 devices. On page 19, a revision history shows that no relevant product specifications have changed. The basic data has been the same since the January 1995 introduction date for Philips, but the original design is much older. Of course, yours may easily be a different brand, but the process here may still apply due to the number of sales and acquisitions, mergers, and rebrandings of the semiconductor manufacturers over the last couple of decades.

GETTING TO KNOW THE CD4047

The outputs of the CD4047 can source and sink, hence the +/- sign in the table. They are limited to 10mA which should be enough for high-efficiency LEDs. This shouldn't be an issue if the output is being fed to another circuit unless the input impedance is low. If it is, or if the load is something drawing larger currents, transistors can easily be used.

If switching time is an issue in your application, we refer you to the tables in the datasheet. There are thirteen entries there and they would take a full printed page here. Most makers won't need to worry too much about that.

Finally, of note is the fact that the threshold for either positive or negative edge triggering in monostable mode is half the supply voltage. In astable mode, at 5V, the worst-case high-to-low time is 120ns. Some of the tables in the datasheets are showing tests at 5MHz.

During bench testing, we initially found some very unexpected behaviour from the IC. At times, triggers did not work, at others, triggers occurred spontaneously, or so it seemed. What had actually happened is a lesson in forgetting the basics. Make sure you use 10kΩ resistors between the pins you are using, and the Vcc or ground rails as appropriate. The inputs are very sensitive to stray voltages, with jumper wires even able to pick up enough induced voltage while plugged in at one end only, as if they were antennas. Inputs also need to be returned to ground or Vcc as appropriate, as they have a definite tendency to float. This is true of many digital ICs but some are affected more than others. These resistors are called pull-up resistors if they tie to V+ or pull-down resistors if they tie to GND.

Floating, if you haven't encountered it before, is when an input settles somewhere between Vcc and ground when unconnected, picking up stray induced voltages, static, circuit leakage, capacitive coupling, or other stray sources of electrical energy which can give false or erratic behaviour at the input. In other cases, the input will simply not change state when a high is removed, unless it is specifically grounded. This is especially true when a device has a capacitor deliberately built in to its input, but ALL ICs have some parasitic capacitance on every pin, and the larger this is, the greater the problem.

Also, make sure any switches you use in bench testing are properly debounced with a suitable capacitor. This turned out to be the source of some of our spurious events. In real applications, most inputs are from other circuits and will not suffer from this issue. However, it is worth considering, both for bench testing and situations where the inputs may be from a limit switch or the like.

THE PHYSICAL LAYOUT

Like many ICs we use at DIYODE, the CD4047 is available in an array of packages, but often only one is available on the retail and maker market. Other types are usually only available from commercial suppliers in commercial quantities. The CD4047 comes in a familiar 14-pin DIP (Dual Inline Plastic) package.

The CD4047 has two main modes of operation: Astable, and Monostable. Unlike timer ICs like the NE555 or an oscillator, no external component changes are required. The two modes are selected by tying different pins to either Vcc or ground, and the same applies to the gating features. The timing period for both modes is set by the resistor and capacitor connected to the first three pins. In both modes, the device completes one full cycle at power on. The Q output will go high and the Q output low for one timing whole timing period, not the 50% duty cycle of normal operation.

As can be seen from the pinout diagram, there are quite a few pins to choose from when considering inputs, and any given application will only use some. Depending on your chosen mode, unused pins must be tied to either ground or Vcc. To make life easier, the datasheet includes a handy table showing which pins are connected to each rail, which are the input pins, and where the outputs occur.

Pin 13 deserves special mention. It is the oscillator pin, and it has a time period that is 50% of the Q output. However, the datasheet specifically points out that the duty cycle of the oscillator may not be 50%, whereas the Q and Q outputs have a 50% duty cycle in astable mode. This means that the oscillator completes one full high/low cycle in the time that the Q output is high, but the ratio of the oscillator's high/low time may not be exactly 50%. In monostable, the Q output is high for the timed period, before the internal flip flop reverts to the Q output being high until another trigger occurs. The oscillator output still functions in this mode, it will just go high only once per Q/Q cycle, with certain exceptions described where they are relevant.

Another pin worth noting is the external reset pin 9. When this pin is high, no output pulse occurs. In practice, this means that the Q output is low and the Q output is high. It functions in astable or monostable mode. The datasheet states that in monostable mode, the external reset will switch the Q output low within one output period, but we found it to be instant when bench tested. The pin can be used to stop the output cycling on power up. If a high is given on this pin as power is applied, the Q output stays high and the Q output stays low, the untriggered standby states. It does not, however, affect the oscillator pin 13. On some datasheets, the external reset is called the manual reset and abbreviated as MR.

TiMING RESISTOR AND CAPACITOR CONSIDERATIONS

The labels for the first three pins vary between the datasheets from different manufacturers. Pin 1 is the C terminal, and is the connection for one end of the capacitor. Pin 2 is the R terminal and is the connection for one end of the resistor. Pin 3 is the RC common terminal and is the connection for the other ends of both the resistor and capacitor. The datasheets state that the capacitor should be non-polarised. This limits you to values less than the commonly-available 1.5μF MKT capacitors or some larger greencap values. Non-polarised electrolytics exist if you really need a bigger value, however, the CD4047 is really intended for switching at speeds less than these larger values would yield.

Additionally, the capacitor needs to have an equivalent series resistance (ESR) at least ten times greater than the timing resistor. This is not always easy to find, as datasheets for capacitors are hard to get when buying retail items - the manufacturers are rarely known and finding the right data is no easy task. Additionally, it may not be plausible for longer timing periods, so the reality for most makers is going to be: Choose a value, measure the results, and see if they match the desired output. Our choices were certainly not within these specifications. Our resistor was substantially larger than our MKT capacitor's ESR because we needed a time period that was slow and easily visible. Much of the time, the CD4047 is going to be used to give much faster timing periods.

Pin connection table

This table shows you the 4047 IC pinouts required for the Use this guide for the following six circuits.

ASTABLE MODE

Astable mode occurs when the IC is retriggered to issue a continuous string of pulses. A high level on the Astable input, or a low level on the Astable input, or both, yields astable operation. The output will continue to change between Q high with Q low, and Q low with Q high, with equal time spent in both conditions, until something causes this to stop. This occurs alongside the considerations described elsewhere for pin 13, the oscillator. This is why astable mode in this IC is referred to as 'gatable': The two input pins can control the oscillator.

On a 555-based astable multivibrator, oscillation continues while power is applied and cannot be stopped without some external means of interrupting the trigger pin, and even then, the output state is not guaranteed. With the CD4047, power can be maintained, and the high signal to the Astable pin 5 or the low to Astable pin 4 can be interrupted to pause the oscillation. During astable operation, the monostable trigger pins should be connected to either Vcc or ground as needed to ensure stable operation.

Astable mode can be enabled as free running or gated. In free running mode, all of the inputs are tied to Vcc or ground rails, and the device simply oscillates as long as there is power. A high on the retrigger pin 12 will cause the Q output to stay high and the Q output to stay low, for as long as the retrigger pin is high. A high on the external reset pin 9 causes the opposite: Q is low and Q is high for as long as pin 9 is high. In both cases, the oscillator pin 13 is unaffected. This is the simplest mode and still has advantages in certain situations over other designs for its low external parts count. However, a 555-based square wave generator needs only one more component, a capacitor to stabilise its pin 5 connection. The real advantage of the CD4047 is that it can be controlled and its states predicted when controlled.

TRUE GATED

Gated astable operation of the CD4047 can be true or complementary. In true gated mode, Astable pin 4 is tied high, and Astable pin 5 is used as the gate. When this pin is high, the Q and Q outputs oscillate. When it goes low, the Q output goes low and the Q output goes high, but only at the end of the current timing period, not instantly. Instant control can only be caused by the external reset pin 9 or retrigger pin 12. Additionally, the oscillator pin 13 also goes low and stays low. Astable Pin 5 is tied with a 10kΩ resistor to ground, and the high signal causes the IC to oscillate. We've represented this with pushbuttons but this would likely be an electronic signal in real applications. The 10kΩ resistors here and elsewhere are good practice even when the signal is from another circuit, as it ensures that the inputs can never float even if another circuit is supposed to prevent this.

Note: The tag 'Ta' or ta appears here and elsewhere. It represents the timing period as calculated or stated. Most parts of most datasheets, and our article, refer to the timing period as for one high output on EITHER output, not both combined as is often the case for a 555 oscillator.

COMPLEMENT GATED

Alternatively, pin 5 can be tied high with a 10kΩ resistor, and then pin 5 can be pulsed to ground to pause the oscillation. It is not covered in the datasheets and we discovered it in a text bench pin mix-up, which means you might too. This method is not best practice, however, and this function is better achieved by complement gating. Complement gating is just the opposite of true gating. Astable pin 5 is tied to ground, and Astable pin 4 is tied to ground via a 10kΩ resistor. A high signal at pin 4 has the effect of pausing the outputs at the end of the current timing period. It pauses with Q high and Q low for as long as there is a high signal at Astable pin 4. The oscillator pin 13 also goes low. As soon as pin 4 is low again, oscillation continues from the beginning of a new timing period.

In the graph shown here, you can see that because the Astable input went high while Q was high, that time period continues until it expires, and then no further output change occurs until the Astable input goes low again. Also visible is the behaviour of the oscillator pin, where the output was already low as part of its cycle during Q being high, and stayed low because no further state change on Q or Q occurred.

MONOSTABLE MODE

In monostable mode, the two astable inputs are tied to the supply rails, Astable pin 5 to ground and Astable pin 4 to Vcc. Now you can choose from one of three sub-modes. The monostable state change can be triggered by a positive edge transition. To do this, the +Trigger pin 8 is connected to the high-going source (the switch connected to the Vcc in our case but usually a high pulse from another circuit or sensor in real applications), and the -Trigger pin 6 is connected to ground. This means that the change occurs as the voltage rises from low to high. The pulse does not have to disappear again for triggering to happen. In fact, if the trigger is a pushbutton as it was in testing, holding it down does not affect the cycle. The timing period will complete and reset no matter how long the button is held down for. During testing, we did experience a few triggers when the button was released, but this turned out to be from a failure to debounce the switch.

Monostable operation can also be achieved with a negative edge transition. In this case, the input is normally high and is taken low to trigger. As for the positive trigger, the edge of the pulse is the trigger here, and the length of the pulse does not matter, beyond a minimum of course. If the pulse length exceeds the timing period, no further triggering will occur until the pulse has risen back above half Vcc then gone low again. The outputs behave the same: Q is low and Q high until triggered, then Q is high and Q is low for the timing period, before reverting. This time, the +Trigger pin 8 is connected to Vcc, while the -trigger pin 6 connects to the negative-going signal. In our test, this was a normally closed switch connected to Vcc, with a 10kΩ resistor connecting the pin to ground to avoid floating. The trigger could still be a normally open switch, which applies Vcc to the pin, but the trigger would occur on release of the switch, not on pressing it.

In either of the previously mentioned submodes, if the external reset pin 9 is used, then a high signal resets the outputs as described above. However, something else can be observed. If the high signal to pin 9 is maintained, but so is the trigger pulse, the pin 13 oscillator output continues to cycle, mimicking astable mode at this pin only. LEDs connected to the outputs would show the Q output to remain high and Q to remain low while the oscillator output cycles.

Finally, there is a retriggerable monostable mode. It is only available in positive edge trigger arrangements. Pins 8 and 12 are connected to the same trigger source. If one trigger pulse is received then positive edge triggering functions as normal. However, if two trigger pulses, reverting to low between them, are received during one timing period, then the output period is doubled. If a single pulse is longer than the timing period, then the output stays high for Q and low for Q until the pulse is removed. After this, the output terminates at a time based on when the positive edge of the oscillator output arrives at one of the internal flip-flops. This is why there is a short spike visible on some of the graphs in the datasheets. The schematic here features a toggle switch so the effect can be easily observed and compared. The oscillator pin 13 continues to output until the pulse is removed.

Note: In this schematic diagram above, we omitted a capacitor across the toggle switch for space reasons. In real situations the connection would likely be permanent but building a test circuit with a toggle switch is useful to visualise the effect of these pins. If you do, include a debouncing capacitor across the relevant switch pins.

TIMING

The time period for astable operation is given for one output, either Q or Q. They are equal. The time period for pins 10 and 11 is tA = 4.4RtCt. The period at pin 13, the oscillator, is tA = 2.2RtCt. For our bench testing, we used a 1μF MKT capacitor and a 240kΩ resistor.

tA = 4.4RtCt

tA = 4.4 x 240 000 x 0.000001

tA = 1.056 seconds.

That means 1.056 seconds with Q high, then 1.056 seconds with Q high. You could recalculate for the oscillator output, or you could just halve the 1.056 seconds.

For monostable operation, the formula is similar, but the numerical constant is slightly different. In this case, the formula is tA = 2.48RtCt. Of course, this gives just the high output, and Q is high until retriggered.

That's all nice and fun, but what if you have a time period you want and need to choose capacitor and resistor values to suit? You need to rearrange the equation, called transposing, and if maths isn't really your thing, this isn't fun. Transposition is a concept some people get, and others struggle with. Just like at school where some people get algebra and some people don't, even though they may be otherwise successful at maths.

Sadly, a lesson on transposing equations that does not relate only to this specific set of numbers and has enough depth for genuine understanding would fill the whole article, so we'll just present two formulas. If you already know your time period and have chosen a capacitor, then use this:

If you know your desired time period and you have chosen a resistor, then use this:

All calculations need to be completed in standard units, not multipliers or divisors. In other words, a 240kΩ resistor must be calculated as 240 000 Ω, and a 1 μF capacitor must be calculated as 0.000001 F. If you're not mathematically minded, you might struggle with this. Many people who do not feel strong in maths find scientific notation and the decimal multiplier systems both challenging. A common mistake from school all the way into adulthood for anyone in this category is to place the wrong number of 0s between the decimal point and the significant figure. For example, 1μF is 1 x 10-6. Commonly, six zeros are placed between the decimal point at the 1, but this is incorrect when working with negative indices. We start with 1 and move the decimal point six places, so we end up with five zeros between the decimal and the digit 1. Of course, if we were multiplying and therefore moving the decimal point to the right, in the positive direction, then the index (that little superscripted '6') would also be the number of zeros to add, which is where this mistake originates.

One way to do this is to remember that the superscripted number in the notation is how many places the decimal point moves, not the number of zeros. For example, if we want to convert 100nF to F, we start with the number '100'. Nano is the decimal multiplier for 10-9, so we then move the decimal point nine places to the left of the number we're working with.

Alternatively, you can use an online calculator like this one. http://www.endmemo.com/sconvert/fuf.php

Just be careful that you are putting the right numbers in the right places, i.e., don't put the number you want to convert into the farads field, as mayhem will ensue. Also be careful to select the right units. It's easy to select 'mf' thinking the font used didn't have the µ symbol when in fact millifarads are a real but rarely used measurement.

Hands On:

Testing Rig

The build this month is pretty simple, and is really a rig for exploring the behaviour of the CD4047 for different input conditions. All aspects have been explained above, but note that it only explores some options connected as it is. It would be mutually exclusive to, for example, connect the Astable input via two 10kΩ resistors, one to Vcc and one to ground, for the two different ways it can be used. The build will be a starting point though, as you explore.The schematics on the next page will help you make the relevant changes, there just won't be a Fritzing for those.These builds will allow you to observe the behaviour of the outputs and explore the effect of the retrigger and reset inputs.

The switches have a 100pF ceramic capacitor across them, soldered at the switch terminals. You might like to rearrange the board a bit so the cap is on the breadboard if you want to avoid soldering the switches. One switch, on the astable complement gated circuit, is a normally closed pushbutton. Another on the monostable is a toggle for connecting pins 8 and 12, or separating them as desired. The other switches are momentary normally open pushbuttons.

Parts Required:	Jaycar	Altronics	Core Electronics
1 x Solderless Breadboard	PB8820	P1002	CE05102
1 x Pack of Breadboard Wire Links	PB8850	P1014A	CE05631
2 x Plug-to-Plug Jumper Leads *	WC6027	P1017	PRT-12795
3 x 150Ω Resistors *	RR0552	R7538	COM-05092
3 x 10kΩ Resistors *	RR0596	R7582	COM-05098
1 x 240kΩ Resistor *	RR0629	R7615	CE07449
1 x 1μF Non-Polarised Capacitor	RM7170	R3037B	CE07450
1 x CD4047 IC	ZC4047	-	CE07451
1 x Red LED *	ZD0152	Z0863A	CE05103
1 x Green LED *	ZD0172	Z0864	CE05103
1 x Blue LED *	ZD0185	Z0869	COM-11372
2 x Normally Open Pushbutton	SP0710	S1060B	CE05249
1 x Normally Closed Pushbutton	SP0717	S1071A	CE07452
1 x SPDT Toggle Switch	ST0335	S1310	POLOLU-1407

* Quantity shown, may be sold in packs. You’ll also need a breadboard and prototyping hardware.

Astable Explorer:

Monostable Explorer: